Huawei has announced plans to design high-end semiconductor chips with transistor density equivalent to 1.4-nanometre processes by 2031, despite ongoing U.S. restrictions on China’s access to advanced chipmaking technologies.
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The projection was outlined as part of what Huawei described as the “Tau Scaling Law,” a new approach aimed at enhancing chip performance as the semiconductor industry faces increasing physical limitations in reducing transistor sizes.
According to the company, He Tingbo, president of Huawei’s semiconductor business and director of its Scientist Committee, introduced the concept during a keynote speech titled New Semiconductor Path in Practice at the IEEE International Symposium on Circuits and Systems.
Huawei said the Tau Scaling Law focuses on reducing the time required for signals and data to travel through chips and computing systems. The company believes the approach could improve computing performance and transistor density even without access to the most advanced manufacturing equipment.
The company also stated that its upcoming Kirin chips, scheduled for release in late 2026, will be the first to adopt a new architecture known as LogicFolding. Huawei claims the technology will reduce internal wiring lengths and significantly improve processing efficiency.
According to Huawei, the company has already designed and mass-produced 381 chips based on concepts linked to the Tau Scaling Law over the past six years, with applications ranging from smartphones to artificial intelligence computing.
The announcement comes as China continues efforts to strengthen domestic semiconductor capabilities amid export restrictions and technology controls imposed by the United States.
